Chip-Area-Efficient Capacitor-less LDO Regulator with Fast-Transient Response

In this paper, a fully-on-chip, NMOS low dropout voltage (LDO) regulator with a capacitance multiplier used for improving the stability and transient response is proposed. This compensation technology emulates a large capacitance value at the gate of the pass FET for high stability and fast transient response. The chip area is much reduced compared to a conventional design. The proposed LDO is designed in a 0.18-μm CMOS process and consumes 13.2 μA quiescent current with 0.1 V dropout and 1.0 V output voltages. It does not require any external compensation capacitor.