题名 | A 50Gb/s PAM-4 Retimer-CDR + VCSEL Driver with Asymmetric Pulsed Pre-Emphasis Integrated into a Single CMOS Die |
作者 | |
发表日期 | 2019
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ISBN | 978-1-7281-3620-2
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会议录名称 | |
卷号 | Part F160-OFC 2019
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页码 | 1-3
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会议日期 | 3-7 March 2019
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会议地点 | San Diego, CA, United states
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出版者 | |
摘要 | A 50 Gb/s PAM-4 Retimer-CDR + VCSEL driver is fully-integrated in a 40nm CMOS process. Measurement results demonstrate wide optical eye openings using a 16GHz bandwidth VCSEL, achieving > 4 dB extinction ratio and < 8 pJ/bit energy efficiency. © 2019 OSA. |
关键词 | |
学校署名 | 其他
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相关链接 | [IEEE记录] |
收录类别 | |
EI入藏号 | 20192006917607
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EI主题词 | Clock and data recovery circuits (CDR circuits)
; CMOS integrated circuits
; Energy efficiency
; Optical fibers
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EI分类号 | Energy Conservation:525.2
; Electric Networks:703.1
; Semiconductor Devices and Integrated Circuits:714.2
; Optical Communication Systems:717.1
; Fiber Optics:741.1.2
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来源库 | EV Compendex
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全文链接 | https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8696680 |
成果类型 | 会议论文 |
条目标识符 | http://sustech.caswiz.com/handle/2SGJ60CL/135435 |
专题 | 工学院_电子与电气工程系 |
作者单位 | 1.Department of Microelectronics, Fudan University, Shanghai; 201203, China 2.Institute of Semiconductors, Chinese Academy of Sciences, Beijing; 100083, China 3.PhotonIC Technologies, Shanghai; 201203, China 4.Department of Electrical and Electronic Engineering, Southern University of Science and Technology, Shenzhen; 518055, China |
推荐引用方式 GB/T 7714 |
Hu, Shang,Yao, Tingyu,Yin, Bozhi,et al. A 50Gb/s PAM-4 Retimer-CDR + VCSEL Driver with Asymmetric Pulsed Pre-Emphasis Integrated into a Single CMOS Die[C]:Institute of Electrical and Electronics Engineers Inc.,2019:1-3.
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条目包含的文件 | 条目无相关文件。 |
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