Research on FOPLP package of multi-chip power module

Jiang，Jing1; Huo，Jia Ren2; Song，Guan Qiang2; Ye，Huaiyu3; Liu，De Bo4; Zhang，Guoqi5; Jun Wang，Jun Tao4

10.1109/ESTC48849.2020.9229816

2020-09-15

978-1-7281-6294-2

Proceedings - 2020 IEEE 8th Electronics System-Integration Technology Conference, ESTC 2020

1-6

15-18 Sept. 2020

Tønsberg, Norway

Power devices are developing for the small volume, high performance and modularization. With more and more application scenarios of Brushless Direct Current Motor (BLDC), MOSFET multi-chip module (MCM) is popular with people. However, the conventional wire Bonding and Copper clip welding technology struggles to meet the requirements for the excessive heat accumulation and complex logic problems in MCM. While the above problems can be well solved by using the new Fan out panel level packing(FOPLP) technology for QFN packaging of multi-chip. The traditional welding technology is used at the bottom of the chip, and the copper porous link is used at the top of the chip with low parasitic capacitance, inductance and low Rdson in electrical performance. In respect to thermal management, the ?JC on the top of the chip can be reduced, which has the effect of double-sided heat dissipation. Top Layer interconnection technology is adopted in the packaging scheme, which can have complex circuit layout.This paper mainly describes the technical implementation of this packaging technology, adopting the finite element software to establish a three-dimensional model of a new type of FOPLP and wire welding packaging for MCM. The thermal resistance of different packaging schemes is calculated to confirm the advantages and disadvantages of different schemes by the way of thermal simulation, the internal temperature distribution of different packaging structures and the main influencing factors of the thermal resistance of packaging compared.

FOPLP Internal resistance MCM Power devices Thermal simulation

其他

英语

EI

20204809545290

Chip scale packages ; Capacitance ; Copper ; Welding ; Microprocessor chips

Construction Methods:405.2 ; Welding:538.2 ; Copper:544.1 ; Electricity: Basic Concepts and Phenomena:701.1 ; Semiconductor Devices and Integrated Circuits:714.2

2-s2.0-85096591449

Scopus

1.FUDAN UNIVERSITY,ACADEMY for ENGINEERINGTECHNOLOGY,Shanghai,China
2.Wuxi Sky Chip Interconnection Technology CO. LTD,Product Research and Development,shenzhen,China
3.Southern University of Science and Technology,Shenzhen Institute of Wide-Bandgap Semiconductors Engineering Research,Center of Integrated Circuits for Next-Generation Communications,Ministry of Education,Shenzhen,China
4.Wuxi Sky Chip Interconnection Technology CO. LTD,R and D Department,Wuxi,China
5.Delft University of Technology,Shenzhen Institute of Wide-Bandgap Semiconductors Electronic Components,Technology and Materials,Delft, CD,2628,Netherlands

Jiang，Jing,Huo，Jia Ren,Song，Guan Qiang,et al. Research on FOPLP package of multi-chip power module[C],2020:1-6.