题名 | A Multi-Core Object Detection Coprocessor for Multi-Scale/Type Classification Applicable to IoT Devices |
作者 | |
通讯作者 | Fengwei An |
共同第一作者 | Zhihua Xiao; Xianglong Wang |
发表日期 | 2020
|
DOI | |
发表期刊 | |
EISSN | 1424-8220
|
卷号 | 20期号:21页码:1-13 |
摘要 | Power effiffifficiency is becoming a critical aspect of IoT devices. In this paper, we present
a compact object-detection coprocessor with multiple cores for multi-scale/type classifification.
This coprocessor is capable to process scalable block size for multi-shape detection-window and can be compatible with the frame-image sizes up to 2048 × 2048 for multi-scale classifification. A memory-reuse strategy that requires only one dual-port SRAM for storing the feature-vector of one-row blocks is developed to save memory usage. Eventually, a prototype platform is implemented on the Intel DE4 development board with the Stratix IV device. The power consumption of each core in FPGA is only 80.98 mW. |
收录类别 | |
语种 | 英语
|
学校署名 | 第一
; 共同第一
; 通讯
|
WOS记录号 | WOS:000589377700001
|
EI入藏号 | 20204509447706
|
EI主题词 | Internet of things
; Object detection
; Object recognition
; Static random access storage
; Efficiency
; Coprocessor
|
EI分类号 | Semiconductor Devices and Integrated Circuits:714.2
; Computer Circuits:721.3
; Data Storage, Equipment and Techniques:722.1
; Data Communication, Equipment and Techniques:722.3
; Computer Software, Data Handling and Applications:723
; Data Processing and Image Processing:723.2
; Production Engineering:913.1
|
ESI学科分类 | CHEMISTRY
|
来源库 | 人工提交
|
引用统计 |
被引频次[WOS]:5
|
成果类型 | 期刊论文 |
条目标识符 | http://sustech.caswiz.com/handle/2SGJ60CL/223856 |
专题 | 工学院_深港微电子学院 |
作者单位 | 1.School of Microelectronics, Southern University of Science and Technology, Shenzhen 518055, China 2.Pengcheng Laboratory, Shenzhen 518055, China; chenl03@pcl.ac.cn 3.Department of Integrated Circuit Engineering, Huazhong University of Science and Technology, Wuhan 430074, China 4.Wuhan National Laboratory for Optoelectronics, Wuhan 430074, China 5.Engineering Research Center of Integrated Circuits for Next-Generation Communications, Ministry of Education, Southern University of Science and Technology, Shenzhen 518055, China |
第一作者单位 | 深港微电子学院 |
通讯作者单位 | 深港微电子学院; 南方科技大学 |
第一作者的第一单位 | 深港微电子学院 |
推荐引用方式 GB/T 7714 |
Peng Xu,Zhihua Xiao,Xianglong Wang,et al. A Multi-Core Object Detection Coprocessor for Multi-Scale/Type Classification Applicable to IoT Devices[J]. Sensors,2020,20(21):1-13.
|
APA |
Peng Xu,Zhihua Xiao,Xianglong Wang,Lei Chen,Chao Wang,&Fengwei An.(2020).A Multi-Core Object Detection Coprocessor for Multi-Scale/Type Classification Applicable to IoT Devices.Sensors,20(21),1-13.
|
MLA |
Peng Xu,et al."A Multi-Core Object Detection Coprocessor for Multi-Scale/Type Classification Applicable to IoT Devices".Sensors 20.21(2020):1-13.
|
条目包含的文件 | ||||||
文件名称/大小 | 文献类型 | 版本类型 | 开放类型 | 使用许可 | 操作 | |
A_Multi-Core_Object_(5435KB) | -- | -- | 开放获取 | -- | 浏览 |
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