Highly Efficient Chip Scale Package (CSP) LED Based on Surface Patterning

Surface patterning, in terms of microstructure, as a precise surface roughness method for chip scale package (CSP) LED, will enormously improve the light extraction efficiency (LEE) with much less total internal reflection loss. In this paper, several kinds of microstructures and layouts have been designed and optimized by using the Monte Carlo ray-tracing simulation method. During the simulation, an accurate CSP-LED model is built Shape, size, separation and arrangement of the microstructures are taken into consideration to find out how much the above parameters affect the LEE. LEE Enhancement of more than 20% is achieved by several structures compared to CSP-LED without surface patterning. Among which, enhancement of 20.90% is reached utilizing 5x5 pyramid arrays with a gradient of 54.7 degrees. Furthermore, each designed microstructure is also fabricated through the nano-imprint technology. Experimental results prove the feasibility of former designs and 20.31% enhancement of LEE is achieved.