南方科技大学知识苑(SUSTech KC): A Low-Power DNN Accelerator Enabled by a Novel Staircase RRAM Array

题名	A Low-Power DNN Accelerator Enabled by a Novel Staircase RRAM Array
作者	Veluri，Hasita 1; Chand，Umesh 1; Li，Yida2 ; Tang，Baoshan 1; Thean，Aaron Voon Yew 3
发表日期	2021
DOI	10.1109/TNNLS.2021.3118451
发表期刊	IEEE Transactions on Neural Networks and Learning Systems 影响因子和分区
ISSN	2162-2388
卷号	PP 期号:99页码:1-12
关键词	Deep neural nets DTCO for Internet of Things (IoT) in-memory compute memristors.
相关链接	[IEEE记录]
收录类别	SCI ; EI
学校署名	其他
EI入藏号	20214411102944
EI主题词	Acceleration ; Budget control ; Convolution ; Deep neural networks ; Digital arithmetic ; Internet of things ; Low power electronics ; Matrix algebra
EI分类号	Ergonomics and Human Factors Engineering:461.4 ; Information Theory and Signal Processing:716.1 ; Computer Theory, Includes Formal Logic, Automata Theory, Switching Theory, Programming Theory:721.1 ; Data Communication, Equipment and Techniques:722.3 ; Computer Software, Data Handling and Applications:723 ; Algebra:921.1 ; Numerical Methods:921.6
来源库	IEEE
全文链接	https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9582748
引用统计	被引频次[WOS]：6
成果类型	期刊论文
条目标识符	http://sustech.caswiz.com/handle/2SGJ60CL/254863
专题	南方科技大学工学院_深港微电子学院
作者单位	1.Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117583. 2.Engineering Research Center of Integrated Circuits for Next-Generation Communications, Ministry of Education, Southern University of Science and Technology, Shenzhen 518055, China. 3.Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117583 (e-mail: aaron.thean@nus.edu.sg)
推荐引用方式 GB/T 7714	Veluri，Hasita,Chand，Umesh,Li，Yida,et al. A Low-Power DNN Accelerator Enabled by a Novel Staircase RRAM Array[J]. IEEE Transactions on Neural Networks and Learning Systems,2021,PP(99):1-12.
APA	Veluri，Hasita,Chand，Umesh,Li，Yida,Tang，Baoshan,&Thean，Aaron Voon Yew.(2021).A Low-Power DNN Accelerator Enabled by a Novel Staircase RRAM Array.IEEE Transactions on Neural Networks and Learning Systems,PP(99),1-12.
MLA	Veluri，Hasita,et al."A Low-Power DNN Accelerator Enabled by a Novel Staircase RRAM Array".IEEE Transactions on Neural Networks and Learning Systems PP.99(2021):1-12.