中文版 | English
题名

分布式近数据计算:传感器内计算和存内计算设计

其他题名
NEAR DATA COMPUTING:DESIGN FOR IN-SENSOR COMPUTING AND IN-MEMORY COMPUTING
姓名
姓名拼音
ZHU Jianghan
学号
11930680
学位类型
硕士
学位专业
0809 电子科学与技术
学科门类/专业学位类别
08 工学
导师
叶涛
导师单位
电子与电气工程系
论文答辩日期
2022-05-10
论文提交日期
2022-06-17
学位授予单位
南方科技大学
学位授予地点
深圳
摘要

  近年来,神经网络和物联网技术飞速发展,且在许多领域都得到了应用。然而,神经网络庞大的数据量和运算量对硬件设计带来了新的挑战,冯诺依曼架构的处理器在面对此类高计算密度任务时,会遇到“内存墙”的瓶颈从而降低了处理效率;物联网技术中众多的传感器会不间断的产生海量冗余数据,给系统的数据传输和存储上带来巨大压力和负担。为了应对这些技术给硬件设计带来的挑战,传感器内计算和存内计算被提出,即将处理单元部署在临近数据产生和存储的位置,以提高系统的处理效率。本课题将传感器内计算和存内计算统称为近数据计算,并设计了相应的电路结构来完成该计算模式。

  本课题提出了一种基于模拟信号的运算电路设计,该电路可直接嵌入在传感器内,可以对收集到的模拟信号进行神经网络运算,节约了模数转换单元;此外,通过将权重参数存储在电路内部,避免了大量数据的访存。如此一来,不再需要将传感器采集到的冗余的原始信息进行传输和存储,而是将经处理提取到的特征信息进行发送,极大地节约了系统资源,提高了处理效率。

  本课题所提出的电路系统包含:原创的模拟信号乘法器电路,以及与该乘法器电路适配的求和机制和负反馈调节系统,激活函数电路、以及与并行模拟运算所适配的数字电路存储系统。该模拟信号乘法器可实现等效4-bit精度,0.5ns延迟和13.2uw功耗的仿真结果,电路使用中芯国际55纳米工艺进行流片和测试,并实现了卷积识别应用。

关键词
语种
中文
培养类别
独立培养
入学年份
2019
学位授予年份
2022-06
参考文献列表

[1] HUA Q, CACHO-SOBLECHERO M, GEORGIOU P. A multi-sensing isfet array for simulta- neous in-pixel detection of light, temperature, moisture and ions[C]//2021 IEEE International Symposium on Circuits and Systems (ISCAS). 2021: 1-5.
[2] ISLAM M T, ASLAN S. Leak detection and location pinpointing in water pipeline systems using a wireless sensor network[C]//2021 IEEE International Symposium on Circuits and Systems (ISCAS). 2021: 1-7.
[3] KHAN A, ALI S, KHAN S, et al. Rapid fabrication of soft strain sensors by multi-nozzle electro- hydrodynamic inkjet printing for wearable electronics[C]//2021 IEEE International Symposium on Circuits and Systems (ISCAS). 2021: 1-4.
[4] KIM S, SUNG H, KIM S, et al. Ml-based humidity and temperature calibration system for het- erogeneous mox sensor array in ppm-level btex monitoring[C]//2021 IEEE International Sym-posium on Circuits and Systems (ISCAS). 2021: 1-5.
[5] BAIRE M, MELIS A, LODI M B, et al. Empowering traditional carasau bread production using wireless sensor network[C]//2021 IEEE International Symposium on Circuits and Systems (ISCAS). 2021: 1-4.
[6] BARRETTINO D, GISLER T, ZUMBüHL C, et al. An iot sensing system for remote monitoring the grain moisture content[C]//2021 IEEE International Symposium on Circuits and Systems (ISCAS). 2021: 1-5.
[7] JOHN A, CARDIFF B, JOHN D. A 1d-cnn based deep learning technique for sleep apnea detec- tion in iot sensors[C]//2021 IEEE International Symposium on Circuits and Systems (ISCAS). 2021: 1-5.
[8] ZHANG B, ZHANG L, WU M, et al. Dynamic gesture recognition based on rf sensor and ae- lstm neural network[C]//2021 IEEE International Symposium on Circuits and Systems (ISCAS). 2021: 1-5.
[9] HIROSE Y, KOYAMA S, OKINO T, et al. 5.6 a 400×400-pixel 6μm-pitch vertical avalanche photodiodes cmos image sensor based on 150ps-fast capacitive relaxation quenching in geiger mode for synthesis of arbitrary gain images[C]//2019 IEEE International Solid- State Circuits Conference - (ISSCC). 2019: 104-106.
[10] HAN J, CACHO-SOBLECHERO M, DOUTHWAITE M, et al. A digital isfet sensor with in- pixel adc[C]//2021 IEEE International Symposium on Circuits and Systems (ISCAS). 2021: 1-5.
[11] XIN Y, ZHANG B, HU C, et al. A 320×240 i-tof cmos image sensor with 2-tap 5.6μm pixel and mismatch-nonlinearity suppression[C]//2021 IEEE International Symposium on Circuits and Systems (ISCAS). 2021: 1-4.
[12] YIN P H, LU C W, WANG J S, et al. A 368 × 184 optical under-display fingerprint sensor comprising hybrid arrays of global and rolling shutter pixels with shared pixel-level adcs[J]. IEEE Journal of Solid-State Circuits, 2021, 56(3): 763-777.
[13] OUH H, SHEN B, JOHNSTON M L. Combined in-pixel linear and single-photon avalanche diode operation with integrated biasing for wide-dynamic-range optical sensing[J]. IEEE Jour- nal of Solid-State Circuits, 2020, 55(2): 392-403.
[14] FINATEU T, NIWA A, MATOLIN D, et al. 5.10 a 1280×720 back-illuminated stacked temporal contrast event-based vision sensor with 4.86μm pixels, 1.066geps readout, programmable event- rate controller and compressive data-formatting pipeline[C]//2020 IEEE International Solid- State Circuits Conference - (ISSCC). 2020: 112-114.
[15] HSU T H, CHEN Y R, LIU R S, et al. A 0.5-v real-time computational cmos image sensor with programmable kernel for feature extraction[J]. IEEE Journal of Solid-State Circuits, 2021, 56 (5): 1588-1596.
[16] LI Z, XU H, LUO L, et al. A 5.9μw ultra-low-power dual-resolution cis chip of sensing-with- computing for always-on intelligent visual devices[C]//2021 IEEE International Symposium on Circuits and Systems (ISCAS). 2021: 1-5.
[17] FAN T, LIU Z, LUO Z, et al. Analog sensing and computing systems with low power consump- tion for gesture recognition[J]. Advanced Intelligent Systems, 2021, 3(1): 2000184.
[18] MENNEL L, SYMONOWICZ J, WACHTER S, et al. Ultrafast machine vision with 2d material neural network image sensors[J]. Nature, 2020, 579(7797): 62-66.
[19] LIU B, CAI H, GONG Y, et al. Binarized weight neural-network inspired ultra-low power speech recognition processor with time-domain based digital-analog mixed approximate computing[C]//2020 IEEE International Symposium on Circuits and Systems (ISCAS). 2020: 1-5.
[20] KANG M, GONUGONDLA S K, PATIL A, et al. A multi-functional in-memory inference processor using a standard 6t sram array[J]. IEEE Journal of Solid-State Circuits, 2018, 53(2): 642-655.
[21] SI X, TU Y N, HUANG W H, et al. 15.5 a 28nm 64kb 6t sram computing-in-memory macro with 8b mac operation for ai edge chips[C]//2020 IEEE International Solid- State Circuits Conference - (ISSCC). 2020: 246-248.
[22] SU J W, SI X, CHOU Y C, et al. 15.2 a 28nm 64kb inference-training two-way transpose multibit 6t sram compute-in-memory macro for ai edge chips[C]//2020 IEEE International Solid- State Circuits Conference - (ISSCC). 2020: 240-242.
[23] ROHAN J N, KULKARNI J P. Realizing direct convolution in memory with systolic-ram[C]// 2021 IEEE Asian Solid-State Circuits Conference (A-SSCC). 2021: 1-3.
[24] YOON J H, CHANG M, KHWA W S, et al. A 40-nm, 64-kb, 56.67 tops/w voltage-sensing computing-in-memory/digital rram macro supporting iterative write with verification and online read-disturb detection[J]. IEEE Journal of Solid-State Circuits, 2022, 57(1): 68-79.
[25] LIU J, TANG W, LIU Y, et al. Almost-nonvolatile igzo-tft-based near-sensor in-memory com- puting[C]//2021 IEEE International Symposium on Circuits and Systems (ISCAS). 2021: 1-5.
[26] VASILEIADIS N, NTINAS V, FYRIGOS I A, et al. A new 1p1r image sensor with in-memory computing properties based on silicon nitride devices[C]//2021 IEEE International Symposium on Circuits and Systems (ISCAS). 2021: 1-5.
[27] WANG J, WANG X, ECKERT C, et al. A 28-nm compute sram with bit-serial logic/arithmetic operations for programmable in-memory vector computing[J]. IEEE Journal of Solid-State Circuits, 2020, 55(1): 76-86.
[28] CHEN Z, YU Z, JIN Q, et al. Cap-ram: A charge-domain in-memory computing 6t-sram for accurate and precision-programmable cnn inference[J]. IEEE Journal of Solid-State Circuits, 2021, 56(6): 1924-1935.
[29] ZHOU K, ZHAO C, FANG J, et al. An energy efficient computing-in-memory accelerator with 1t2r cell and fully analog processing for edge ai applications[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 68(8): 2932-2936.
[30] GONUGONDLA S K, KANG M, SHANBHAG N. A 42pj/decision 3.12tops/w robust in- memory machine learning classifier with on-chip training[C]//2018 IEEE International Solid - State Circuits Conference - (ISSCC). 2018: 490-492.
[31] HAN G, SANCHEZ-SINENCIO E. Cmos transconductance multipliers: a tutorial[J]. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 1998, 45(12): 1550-1563.
[32] GHOMI A, DOLATSHAHI M. Design of a new cmos low-power analogue neuron[J]. Iete Journal of Research, 2017: 1-9.
[33] ALOUI I, HASSEN N, BESBES K. ±0.75v four quadrant analog multiplier in current mode[C]// 2018 15th International Multi-Conference on Systems, Signals Devices (SSD). 2018: 1045- 1050.
[34] PAWARANGKOON P, SAWIGUN C. A compact bulk-driven four-quadrant analog multiplier in weak inversion[C]//2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS). 2018: 26-29.
[35] SOBRINHO DE SOUSA A J, DE ANDRADE F, DOS SANTOS H, et al. Cmos analog four- quadrant multiplier free of voltage reference generators[C]//2019 32nd Symposium on Inte- grated Circuits and Systems Design (SBCCI). 2019: 1-6.
[36] DE SOUSA A J S, CARDOSO F M, NUNES K K C F, et al. A very compact cmos analog multiplier for application in cnn synapses[C]//2019 IEEE 10th Latin American Symposium on Circuits Systems (LASCAS). 2019: 241-244.
[37] DANESH M, JAYARAJ A, CHANDRASEKARAN S T, et al. Ultra-low power analog mul- tiplier based on translinear principle[C]//2019 IEEE International Symposium on Circuits and Systems (ISCAS). 2019: 1-5.
[38] DENG L, YU D. Deep learning: methods and applications[J]. Foundations and Trends in Signal Processing, 2014, 7(3–4): 197-387.
[39] SCHERER D, MÜLLER A, BEHNKE S. Evaluation of pooling operations in convolutional architectures for object recognition[C]//International Conference on Artificial Neural Networks. Springer, 2010: 92-101.
[40] HASTIE T, TIBSHIRANI R, FRIEDMAN J H, et al. The elements of statistical learning: data mining, inference, and prediction: volume 2[M]. Springer, 2009.
[41] HAN J, MORAGA C. The influence of the sigmoid function parameters on the speed of backpropagation learning[C]//International Workshop on Artificial Neural Networks. Springer, 1995: 195-201.
[42] GLOROT X, BORDES A, BENGIO Y. Deep sparse rectifier neural networks[C]//Proceedings of the 14th International Conference on Artificial Intelligence and Statistics. JMLR Workshop and Conference Proceedings, 2011: 315-323.
[43] LECUN Y, BOTTOU L, BENGIO Y, et al. Gradient-based learning applied to document recog- nition[J]. Proceedings of the IEEE, 1998, 86(11): 2278-2324.
[44] RUMELHART D E, HINTON G E, WILLIAMS R J. Learning representations by back- propagating errors[J]. Nature, 1986, 323(6088): 533-536.
[45] ZELL A. Simulation neuronaler netze: volume 1[M]. Addison-Wesley Bonn, 1994.
[46] KRIZHEVSKY A, SUTSKEVER I, HINTON G E. Imagenet classification with deep convolu- tional neural networks[J]. Advances in Neural Information Processing Systems, 2012, 25.
[47] SIMONYAN K, ZISSERMAN A. Very deep convolutional networks for large-scale image recognition[J]. arXiv preprint arXiv:1409.1556, 2014.
[48] SZEGEDY C, LIU W, JIA Y, et al. Going deeper with convolutions[C]//Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition. 2015: 1-9.
[49] HE K, ZHANG X, REN S, et al. Deep residual learning for image recognition[C]//Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition. 2016: 770-778.
[50] GRIEWANK A, UTKE J, WALTHER A. Evaluating higher derivative tensors by forward prop- agation of univariate taylor series[J]. Mathematics of Computation, 2000, 69(231): 1117-1130.
[51] HECHT-NIELSEN R. Theory of the backpropagation neural network[M]//Neural Networks for Perception. Elsevier, 1992: 65-93.

所在学位评定分委会
电子与电气工程系
国内图书分类号
TN432
来源库
人工提交
成果类型学位论文
条目标识符http://sustech.caswiz.com/handle/2SGJ60CL/335958
专题工学院_电子与电气工程系
推荐引用方式
GB/T 7714
朱江瀚. 分布式近数据计算:传感器内计算和存内计算设计[D]. 深圳. 南方科技大学,2022.
条目包含的文件
文件名称/大小 文献类型 版本类型 开放类型 使用许可 操作
11930680-朱江瀚-电子与电气工程(20383KB)----限制开放--请求全文
个性服务
原文链接
推荐该条目
保存到收藏夹
查看访问统计
导出为Endnote文件
导出为Excel格式
导出为Csv格式
Altmetrics Score
谷歌学术
谷歌学术中相似的文章
[朱江瀚]的文章
百度学术
百度学术中相似的文章
[朱江瀚]的文章
必应学术
必应学术中相似的文章
[朱江瀚]的文章
相关权益政策
暂无数据
收藏/分享
所有评论 (0)
[发表评论/异议/意见]
暂无评论

除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。