题名 | An Artificial Neural Network Implemented Using Parallel Dual-Gate Thin-Film Transistors |
作者 | |
通讯作者 | Hu, Yushen |
发表日期 | 2022-09-01
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DOI | |
发表期刊 | |
ISSN | 0018-9383
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EISSN | 1557-9646
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卷号 | 69期号:10页码:5574-5579 |
摘要 | Implementing in-memory computation, an artificial neural network (ANN) consisting of thin-film transistors (TFTs) monolithically integrated in each unit of an array of capacitors is constructed. Both single-gate and parallel, dual-gate (DG) TFTs are deployed. The capacitors and the DG TFTs serve as the respective memory and computational elements. The DG TFT offers the capability of amplifying a weak but relevant input signal and suppressing a strong but irrelevant input signal across a synaptic gap, and the storage of charge on the capacitor is pseudostatic because of the exceptionally low oFr-state leakage current of the accompanying address TFT built on a metal-oxide semiconductor. The feasibility of such an ANN is demonstrated using a 4 x 6 array for classifying a specific set of Tetris patterns. |
关键词 | |
相关链接 | [来源记录] |
收录类别 | |
语种 | 英语
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学校署名 | 通讯
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资助项目 | Innovation and Technology Fund[GHP/013/19SZ]
; Science and Technology Program of Shenzhen[JCYJ20200109140601691]
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WOS研究方向 | Engineering
; Physics
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WOS类目 | Engineering, Electrical & Electronic
; Physics, Applied
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WOS记录号 | WOS:000852217000001
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出版者 | |
ESI学科分类 | ENGINEERING
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来源库 | Web of Science
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全文链接 | https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9877914 |
引用统计 |
被引频次[WOS]:4
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成果类型 | 期刊论文 |
条目标识符 | http://sustech.caswiz.com/handle/2SGJ60CL/401571 |
专题 | 工学院_深港微电子学院 |
作者单位 | 1.Hong Kong Univ Sci & Technol, Dept Elect & Comp Engn, Hong Kong, Peoples R China 2.Southern Univ Sci & Technol, Sch Microelect, Shenzhen 518055, Peoples R China 3.Hong Kong Univ Sci & Technol HKUST, Dept Elect & Comp Engn, Hong Kong, Peoples R China 4.Hong Kong Univ Sci & Technol HKUST, Shenzhen Res Inst, Hong Kong, Peoples R China |
第一作者单位 | 深港微电子学院 |
通讯作者单位 | 深港微电子学院 |
推荐引用方式 GB/T 7714 |
Hu, Yushen,Lei, Tengteng,Wang, Yuqi,et al. An Artificial Neural Network Implemented Using Parallel Dual-Gate Thin-Film Transistors[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES,2022,69(10):5574-5579.
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APA |
Hu, Yushen,Lei, Tengteng,Wang, Yuqi,Wang, Fei,&Wong, Man.(2022).An Artificial Neural Network Implemented Using Parallel Dual-Gate Thin-Film Transistors.IEEE TRANSACTIONS ON ELECTRON DEVICES,69(10),5574-5579.
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MLA |
Hu, Yushen,et al."An Artificial Neural Network Implemented Using Parallel Dual-Gate Thin-Film Transistors".IEEE TRANSACTIONS ON ELECTRON DEVICES 69.10(2022):5574-5579.
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