南方科技大学知识苑(SUSTech KC): A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing

题名	A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing
作者	Li，Kai1 ; Mao，Wei1 ; Zhou，Junzhuo 1; Li，Boyu 1; Yang，Zhengke 1; Yang，Shuxing 1; Du，Laimin 2; Huang，Sixiao1 ; Yu，Hao1
发表日期	2022
DOI	10.1109/TCSII.2022.3183007
发表期刊	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS 影响因子和分区
ISSN	1549-7747
EISSN	1558-3791
页码	1-1
摘要	There is an emerging need to design multi-precision floating-point (FP) accelerators for high-performance-computing (HPC) applications. The commonly-used methods are based on high-precision-split (HPS) and low-precision-combination (LPC) structures, which suffer from low hardware utilization ratio and various multiple clock-cycle processing periods. In this paper, a new multi-precision FP processing element (PE) is developed with proposed bit-partitioning method. Minimized redundant bits and operands are achieved. The proposed PE supports 16× half-precision (FP16), 4× single-precision (FP32) and 1× double-precision (FP64) operations with 100% multiplication hardware utilization ratio. Besides, vector systolic structure is designed for PE array to increase the system-level throughput and energy efficiency. The proposed design is realized in a 28-nm process with 1.351-GHz clock frequency. Compared with the existing multi-precision FP methods, the proposed work exhibits the best energy-efficiency performance of 1193 GFLOPS/W at FP16, 317 GFLOPS/W at FP32 and 77.3 GFLOPS/W at FP64 with at least 22.3%, 30% and 3.3% improvement, respectively.
关键词	accelerator Adders Energy efficiency floating-point Hardware High performance computing HPC MAC Mathematical models Multi-precision PE Resource management systolic Systolic arrays vector
相关链接	[Scopus记录]
收录类别	SCI ; CPCI-S ; EI
语种	英语
学校署名	第一
WOS记录号	WOS:000859143700035
EI入藏号	20222612278149
EI主题词	Adders ; Clocks ; Digital arithmetic ; Structural design ; Systolic arrays
EI分类号	Structural Design, General:408.1 ; Energy Conservation:525.2 ; Computer Theory, Includes Formal Logic, Automata Theory, Switching Theory, Programming Theory:721.1 ; Numerical Methods:921.6 ; Special Purpose Instruments:943.3
ESI学科分类	ENGINEERING
Scopus记录号	2-s2.0-85132770022
来源库	Scopus
引用统计	被引频次[WOS]：10
成果类型	期刊论文
条目标识符	http://sustech.caswiz.com/handle/2SGJ60CL/402787
专题	工学院_深港微电子学院
作者单位	1.School of Microelectronics, and Engineering Research Center of Integrated Circuits for Next-Generation Communications, Ministry of Education, Southern University of Science and Technology, Shenzhen, China 2.
第一作者单位	深港微电子学院
第一作者的第一单位	深港微电子学院
推荐引用方式 GB/T 7714	Li，Kai,Mao，Wei,Zhou，Junzhuo,et al. A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS,2022:1-1.
APA	Li，Kai.,Mao，Wei.,Zhou，Junzhuo.,Li，Boyu.,Yang，Zhengke.,...&Yu，Hao.(2022).A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS,1-1.
MLA	Li，Kai,et al."A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing".IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS (2022):1-1.