Post-Processing Refinement for Semi-Global Matching Algorithm Based on Real-Time FPGA

Yunhao Ma1; Xiwei Fang1; Pingcheng Dong1; Xinyu Guan1; Ke Li1; Lei Chen1; Fengwei An2

10.1109/SOCC56010.2022.9908134

2022

35th IEEE International System-on-Chip Conference (SOCC)

2164-1676

2164-1706

978-1-6654-5986-0

2022 IEEE 35th International System-on-Chip Conference (SOCC)

1-5

5-8 Sept. 2022

Belfast, United Kingdom

345 E 47TH ST, NEW YORK, NY 10017 USA

IEEE

The Semi-Global Matching (SGM) algorithms and their hardware accelerators, which emphasize stereo matching rather than occlusion filling, have been developed in the last few years. However, filling occlusions is indispensable for many real-world applications. This work presents a pixel-level pipeline architecture for the post-processing of SGM, which refines disparity through a left-right check, and multi-directional occlusion filling refinement. The hardware architecture based on optimization algorithms is on the Stratix-IV platform, and it consumes about 5720 LUTs, 12961 registers, and 2.15M bits of on-chip memory. The maximum working frequency can reach up to 95.15 MHz for the 640x480 resolution video and 128 disparity range with the power dissipation of 1.46 W and 320 frames per second processing speed.

Semi-global Matching Post-Processing Left-Right Check Occlusion Filing FPGA

第一

英语

CPCI-S

Shenzhen Science and Technology Innovation Commission["JSGG20200102162401765","K2021390006","K2021390007"]

Computer Science ; Engineering

Computer Science, Hardware & Architecture ; Engineering, Electrical & Electronic

WOS:000885041700012

IEEE

1.School of Microelectronics, Southern University of Science and Technology
2.Engineering Research Center of Integrated Circuits for Next-Generation Communications, Ministry of Education, Southern University of Science and Technology, Shenzhen, China

Yunhao Ma,Xiwei Fang,Pingcheng Dong,et al. Post-Processing Refinement for Semi-Global Matching Algorithm Based on Real-Time FPGA[C]. 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE,2022:1-5.