南方科技大学知识苑(SUSTech KC): A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS

题名	A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS
作者	Wang, Juncheng 1; Pan, Quan2 ; Qin, Yajie 1; Chen, Xuefeng 3; Hu, Shang 1; Bai, Rui 3; Wang, Xin 3; Cai, Yaxin 3; Xia, Tao 3; Zhang, Yuanxi 3; Ma, Jianxu 3; Qi, Nan 4; Chiang, Patrick Yin 1
通讯作者	Pan, Quan
发表日期	2019-10
DOI	10.1109/TCSII.2019.2925363
发表期刊	IEEE Transactions on Circuits and Systems II: Express Briefs 影响因子和分区
ISSN	1558-3791
卷号	66 期号:10页码:1698-1702
关键词	CMOS low noise optical receiver 25Gb/s transimpedance amplifier
相关链接	[IEEE记录]
收录类别	SCI ; CPCI-S ; EI
学校署名	通讯
EI入藏号	20194007491457
EI主题词	Phase comparators ; Capacitance ; Continuous time systems ; CMOS integrated circuits ; Group delay ; Bandwidth ; Clock and data recovery circuits (CDR circuits)
EI分类号	Electricity: Basic Concepts and Phenomena:701.1 ; Electric Networks:703.1 ; Amplifiers:713.1 ; Electronic Circuits Other Than Amplifiers, Oscillators, Modulators, Limiters, Discriminators or Mixers:713.5 ; Semiconductor Devices and Integrated Circuits:714.2 ; Information Theory and Signal Processing:716.1 ; Systems Science:961
来源库	IEEE
全文链接	https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8747429
引用统计	被引频次[WOS]：11
成果类型	期刊论文
条目标识符	http://sustech.caswiz.com/handle/2SGJ60CL/42088
专题	工学院_深港微电子学院
作者单位	1.Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China 2.Southern Univ Sci & Technol, Sch Microelect, Shanghai 518055, Peoples R China 3.PhotonIC Technol Inc, Shanghai 201203, Peoples R China 4.Chinese Acad Sci, Inst Semicond, Beijing 100083, Peoples R China
通讯作者单位	深港微电子学院
推荐引用方式 GB/T 7714	Wang, Juncheng,Pan, Quan,Qin, Yajie,et al. A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS[J]. IEEE Transactions on Circuits and Systems II: Express Briefs,2019,66(10):1698-1702.
APA	Wang, Juncheng.,Pan, Quan.,Qin, Yajie.,Chen, Xuefeng.,Hu, Shang.,...&Chiang, Patrick Yin.(2019).A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS.IEEE Transactions on Circuits and Systems II: Express Briefs,66(10),1698-1702.
MLA	Wang, Juncheng,et al."A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS".IEEE Transactions on Circuits and Systems II: Express Briefs 66.10(2019):1698-1702.

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