基于 RRAM 存储阵列的存算一体系统研究

互联网和移动设备的普及让社会进入了大数据时代，这既促进了人工智能技 术的飞速发展，同时也带来了新的挑战。传统的冯诺依曼架构由于其存储单元与 计算单元分离的结构性限制，导致了”内存墙“的问题，因此提出了一种将计算单 元与存储单元结合的存算一体解决方案。这也得益于新型非易失性存储器的发展 和突破以及新的操作机理，本文正是针对新型存储器——RRAM(Resistive Random Access Memory) 的存算一体方案所进行的研究。 本文从 RRAM 的基本介绍、工作方式和电气特性出发，重点强调了 RRAM 作 为新一代存算一体存储器的优势所在，并为后面的外围电路设计提供了理论上的 准备。外围电路的主要功能是对存储阵列实现读写操作，在具体设计上，该电路 系统的模块组成包括用来确定存储单元位置的 WL 和 BL 选通模块、读写功能切 换模块、用于将电流转电压的读取电路和实现信号转换 DAC/ADC 模块。该电路系 统被用来测试 RRAM 器件的电气特性参数，如耐久性、数据保留性和 LTP

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