南方科技大学知识苑(SUSTech KC): Reliability Exploration of System-on-Chip With Multi-Bit-Width Accelerator for Multi-Precision Deep Neural Networks

题名	Reliability Exploration of System-on-Chip With Multi-Bit-Width Accelerator for Multi-Precision Deep Neural Networks
作者	Quan Cheng 1; Mingqiang Huang 2; Changhai Man 3; Ao Shen 2 ; Liuyao Dai 4; Hao Yu2 ; Masanori Hashimoto 1
发表日期	2023
DOI	10.1109/TCSI.2023.3300899
发表期刊	IEEE Transactions on Circuits and Systems I: Regular Papers 影响因子和分区
ISSN	1558-0806
卷号	PP 期号:99页码:1-14
关键词	Multi-bit-width CNN accelerator NAS reliability FPGA SoC
相关链接	[IEEE记录]
收录类别	SCI ; EI
学校署名	其他
WOS记录号	WOS:001051251100001
EI入藏号	20233414602066
EI主题词	Convolution ; Deep neural networks ; Economic and social effects ; Energy efficiency ; Error correction ; Failure analysis ; Field programmable gate arrays (FPGA) ; Flash memory ; Neutron irradiation ; Neutrons ; Program processors ; Programmable logic controllers ; Radiation hardening ; Reliability analysis
EI分类号	Ergonomics and Human Factors Engineering:461.4 ; Energy Conservation:525.2 ; Semiconductor Devices and Integrated Circuits:714.2 ; Information Theory and Signal Processing:716.1 ; Logic Elements:721.2 ; Computer Circuits:721.3 ; Data Storage, Equipment and Techniques:722.1 ; Control Equipment:732.1 ; Social Sciences:971
来源库	IEEE
全文链接	https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10220121
引用统计	被引频次[WOS]：9
成果类型	期刊论文
条目标识符	http://sustech.caswiz.com/handle/2SGJ60CL/559272
专题	工学院_深港微电子学院
作者单位	1.Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan 2.School of Microelectronics, Southern University of Science and Technology, Shenzhen, China 3.School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA 4.Department of Electrical Engineering and Computer Science, University of California at Merced, Merced, CA, USA
推荐引用方式 GB/T 7714	Quan Cheng,Mingqiang Huang,Changhai Man,et al. Reliability Exploration of System-on-Chip With Multi-Bit-Width Accelerator for Multi-Precision Deep Neural Networks[J]. IEEE Transactions on Circuits and Systems I: Regular Papers,2023,PP(99):1-14.
APA	Quan Cheng.,Mingqiang Huang.,Changhai Man.,Ao Shen.,Liuyao Dai.,...&Masanori Hashimoto.(2023).Reliability Exploration of System-on-Chip With Multi-Bit-Width Accelerator for Multi-Precision Deep Neural Networks.IEEE Transactions on Circuits and Systems I: Regular Papers,PP(99),1-14.
MLA	Quan Cheng,et al."Reliability Exploration of System-on-Chip With Multi-Bit-Width Accelerator for Multi-Precision Deep Neural Networks".IEEE Transactions on Circuits and Systems I: Regular Papers PP.99(2023):1-14.