A 2 x 24Gb/s Single-Ended Transceiver with Channel-Independent Encoder-Based Crosstalk Cancellation in 28nm CMOS

Hongzhi Wu; Weitao Wu; Liping Zhong; Xuxu Cheng; Xiongshi Luo; Zhenghao Li; Dongfan Xu; Quan Pan

10.1109/A-SSCC58667.2023.10347980

2023

979-8-3503-3004-5

2023 IEEE Asian Solid-State Circuits Conference (A-SSCC)

1-3

5-8 Nov. 2023

Haikou, China

The demand for ever-increasing throughput has impelled the swift growth of I/Os with finite areas and higher data rate per pin. To meet this demand, the design of passive links needs to be more complex, leading to a considerable rise in hardware expenses [1]. The single-ended multiple input multiple output (SE-MIMO) scheme discussed in [2], thus becomes an attractive solution, which aims to transmit two single-ended (SE) signals in a pair of tightly coupled differential channels. This scheme halves the bandwidth requirement and allows a 2x increase in routing density in a compact area. It means that higher data rates can be achieved with the existing hardware infrastructure, thus reducing costs. However, it would induce significant crosstalk. The crosstalk among different pairs of differential channels was typically eliminated through careful hardware layout [3]. Nevertheless, the crosstalk within a pair of closely coupled differential channels is still a thorny challenge for the existing advanced crosstalk cancellation (XTC) techniques. The crosstalk cancellation and signal reutilization technique in [5] is sensitive to the physical characteristics of different channels. In [4], [7], realizing pre-equalization with limited precision at TX to eliminate crosstalk will lead to excess noise tails. The Chord signaling, which transmits N-bit data over N+1 channels, is proposed to suppress crosstalk [6]. However, it lowers the pin efficiency by a factor of (N+1)/N. Therefore, an efficient and channel-independent XTC method is highly desirable to support SE-MIMO applications in various scenarios.

Layout Crosstalk Tail Throughput Routing Hardware Transceivers

第一

EI

20240315390291

Channel coding ; CMOS integrated circuits ; MIMO systems ; Radio transceivers ; Signal encoding

Semiconductor Devices and Integrated Circuits:714.2 ; Information Theory and Signal Processing:716.1 ; Radio Systems and Equipment:716.3 ; Data Communication, Equipment and Techniques:722.3

IEEE

Southern University of Science and Technology

Hongzhi Wu,Weitao Wu,Liping Zhong,et al. A 2 x 24Gb/s Single-Ended Transceiver with Channel-Independent Encoder-Based Crosstalk Cancellation in 28nm CMOS[C],2023:1-3.