Pushing the high-k scalability limit with a superparaelectric gate layer

Wang, Kun1,2,3; Liu, Chao1; Zhang, Yuan4; Lv, Fuyu1; Ouyang, Jun1,2,5; Huang, Houbing6,7; Yang, Rui-long8; Zhao, Yu-Yao2; Cheng, Hongbo1; Zhu, Hanfei1; Shi, Xiaoming6,7; Tian, Yun2

2024-04-01

10.26599/JAC.2024.9220876

JOURNAL OF ADVANCED CERAMICS   影响因子和分区

2226-4108

2227-8508

To meet the expectation set by Moore's law on transistors, the search for thickness-scalable high dielectric constant (k) gate layers has become an emergent research frontier. Previous investigations have failed to solve the "polarizability-scalability-insulation robustness" trilemma. In this work, we show that this trilemma can be solved by using a gate layer of a high k ferroelectric oxide in its superparaelectric (SPE) state. In the SPE, its polar order becomes local and is dispersed in an amorphous matrix with a crystalline size down to a few nanometers, leading to an excellent dimensional scalability and a good field-stability of the k value. As an example, a stable high k value (37 +/- 3) is shown in ultrathin SPE films of (Ba-0.95,Sr-0.05)(Zr-0.2,Ti-0.8)O-3 deposited on LaNiO3-buffered Pt/Ti/SiO2/(100)Si down to a 4 nm thickness, leading to a small equivalent oxide thickness of similar to 0.46 nm. The aforementioned characteristic microstructure endows the SPE film a high breakdown strength (similar to 10.5 MV.cm(-1) for the 4 nm film), and hence ensures a low leakage current for the operation of the complementary metal oxide semiconductor (CMOS) gate. Lastly, a high electrical fatigue resistance is displayed by the SPE films. These results reveal a great potential of superparaelectric materials as gate dielectrics in the next-generation microelectronics.

high-k transistors Moore's law superparaelectric insulation robustness

SCI ; EI

英语

其他

National Natural Science Foundation of China["51772175","52002192"] ; Natural Science Foundation of Shandong Province["ZR2022ZD39","ZR2020QE042","ZR2022ME031","ZR2022QB138"] ; Science, Education and Industry Integration Pilot Projects of Qilu University of Technology (Shandong Academy of Sciences)["2022GH018","2022PY055"] ; Jinan City Science and Technology Bureau[2021GXRC055] ; Education Department of Hunan Province/Xiangtan University[KZ0807969]

Materials Science

Materials Science, Ceramics

WOS:001225049600002

TSINGHUA UNIV PRESS

Web of Science

1.Qilu Univ Technol, Inst Adv Energy Mat & Chem, Shandong Acad Sci, Sch Chem & Chem Engn,Jinan Engn Lab Multiscale Fun, Jinan 250353, Peoples R China
2.Shandong Univ, Sch Mat Sci & Engn, Key Lab Liquid Solid Struct Evolut & Proc Mat, Minist Educ, Jinan 250061, Peoples R China
3.China Tobacco Shandong Ind Co Ltd, Jinan 250104, Peoples R China
4.Southern Univ Sci & Technol, Dept Mat Sci & Engn, Shenzhen 518055, Peoples R China
5.Xiangtan Univ, Sch Mat Sci & Engn, Key Lab Key Film Mat & Applicat Equipments Hunan P, Xiangtan 411105, Peoples R China
6.Beijing Inst Technol, Adv Res Inst Multidisciplinary Sci, Beijing 100081, Peoples R China
7.Beijing Inst Technol, Sch Mat Sci & Engn, Beijing 100081, Peoples R China
8.Shanxi Normal Univ, Sch Chem & Mat Sci, Key Lab Magnet Mol & Magnet Informat Mat, Minist Educ, Taiyuan 030032, Peoples R China

Wang, Kun,Liu, Chao,Zhang, Yuan,et al. Pushing the high-k scalability limit with a superparaelectric gate layer[J]. JOURNAL OF ADVANCED CERAMICS,2024,13(4).

Wang, Kun.,Liu, Chao.,Zhang, Yuan.,Lv, Fuyu.,Ouyang, Jun.,...&Tian, Yun.(2024).Pushing the high-k scalability limit with a superparaelectric gate layer.JOURNAL OF ADVANCED CERAMICS,13(4).

Wang, Kun,et al."Pushing the high-k scalability limit with a superparaelectric gate layer".JOURNAL OF ADVANCED CERAMICS 13.4(2024).