Investigation on Transient Failure Mode of Asymmetric Trench Gate SiC MOSFET Under Single-Pulse Avalanche Stress

Shaogang Wang1,2; Yanlong Tan3; Xu Liu2; Shizhen Li2; Ke Liu2; Wucheng Yuan2; Tao Lin4; Guoqi Zhang1; Paddy French1; Huaiyu Ye2; Chunjian Tan2

10.1109/ICEPT59018.2023.10492291

2023-08-11

2836-9734

979-8-3503-3882-9

2023 24th International Conference on Electronic Packaging Technology (ICEPT)

8-11 Aug. 2023

Shihezi City, China

In this article, the avalanche withstand capability and transient failure model of commercial 1200 V asymmetric trench gate SiC MOSFETs are investigated by experiment and simulation under single-pulse unclamped inductive switching (UIS) conditions. The limiting avalanche current and limiting avalanche energy of the device are determined by evaluating the voltage and current waveforms, the power dissipation, and the avalanche energy curves before and during avalanche failure. Then, by using the calibrated simulation model, the sequence between the critical electric field stress and critical thermal stress suffered by the device is revealed, and the transient failure mode of the device is proved to be the thermal runaway. Moreover, after decapping the failed device, the failure mode of the device is further confirmed by analyzing the failure point. Finally, by using the focused ion beam (FIB) technology, the failure mechanism of the device is confirmed as a structural rupture caused by avalanche thermal stress.

其他

1.Faculty of EEMCS, Delft University of Technology, Delft, The Netherlands
2.School of Microelectronics, Southern University of Science and Technology, Shenzhen, China
3.Research Institute of Fudan University in Ningbo, Ningbo, China
4.PhasedCom Communication Technology Co., Ltd., Shenzhen, China

Shaogang Wang,Yanlong Tan,Xu Liu,et al. Investigation on Transient Failure Mode of Asymmetric Trench Gate SiC MOSFET Under Single-Pulse Avalanche Stress[C],2023.