题名 | High VTH and Breakdown Enhancement-Mode GaN HEMTs for Power ICs Application Using Charge Trapping Layer |
作者 | |
DOI | |
发表日期 | 2024-06-06
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ISSN | 1063-6854
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ISBN | 979-8-3503-9483-2
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会议录名称 | |
会议日期 | 2-6 June 2024
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会议地点 | Bremen, Germany
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摘要 | This work demonstrates a high VTH (+8.4 V) and breakdown voltage (1100 V) Enhancement-mode GaN HEMTs using an $\text{Al:HfO}_{\mathrm{x}}$-based charge trapping layer (CTL). The operation mechanism is investigated through TCAD simulation, and the device performance is systematically evaluated through static and dynamic electrical measurements. Thanks to the VTHis tunable by initialization voltage, we prove that the fabricated CTL-based GaN inverters can operate under a variety of conditions ($\beta=10-40$ and $\mathrm{V}_{\text{DD}}=3$ V-15 V) with commendable output swing and noise margins. These results present a promising approach towards to realizing the monolithic integration of GaN devices for power ICs applications. |
学校署名 | 第一
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相关链接 | [IEEE记录] |
收录类别 | |
引用统计 | |
成果类型 | 会议论文 |
条目标识符 | http://sustech.caswiz.com/handle/2SGJ60CL/789204 |
专题 | 工学院_深港微电子学院 |
作者单位 | 1.School of Microelectronics, Southern University of Science and Technology, Shenzhen, China 2.Department of Electrical and Electronic Engineering, The University of Hong Kong, Hong Kong |
第一作者单位 | 深港微电子学院 |
第一作者的第一单位 | 深港微电子学院 |
推荐引用方式 GB/T 7714 |
Yang Jiang,Fangzhou Du,Kangyao Wen,et al. High VTH and Breakdown Enhancement-Mode GaN HEMTs for Power ICs Application Using Charge Trapping Layer[C],2024.
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条目包含的文件 | 条目无相关文件。 |
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