D2 Buck Converter With Delay-Insensitive Response and Adaptive On-Time Extension During Load Transient

Lingfeng Zhu1,2; Wing-Hung Ki1; Yue Zhong1; Xiaofei Ma1; Junmin Jiang2

10.1109/ISCAS58744.2024.10558657

2024-05-22

0271-4302

979-8-3503-3100-4

2024 IEEE International Symposium on Circuits and Systems (ISCAS)

19-22 May 2024

Singapore, Singapore

This paper proposes a D2 buck converter that achieves higher efficiency than the double-step-down (DSD) converter driving medium load current. It also minimizes undershoot and recovery time of load transient response. The D2 buck converter consists of two buck converters in cascade, with the first handling high input voltage and low input current, and the second using low-voltage power switches to enhance efficiency. By implementing a sawtooth generator with well-defined thresholds, the undershoot detector realizes both delay-insensitive response and adaptive on-time extension during load transient. This work is designed in a 180nm BCD process. The first stage converts 24V to 4V, and the second stage converts 4V to 1V. For a load increase from 0.1A to 1.1A with an edge time of 20ns, the worst-case undershoot was better than 15%, and the recovery time was 2.7µs. The simulated peak efficiency was 91.9% with the load current ranging from 0.1A to 4A.

其他

EI

1.The Hong Kong University of Science and Technology, Hong Kong, China
2.Department of Electronic and Electrical Engineering, Southern University of Science and Technology, Shenzhen, China

Lingfeng Zhu,Wing-Hung Ki,Yue Zhong,et al. D2 Buck Converter With Delay-Insensitive Response and Adaptive On-Time Extension During Load Transient[C],2024.