A 29.12 TOPS/W and 1.13 TOPS/mm2 NAS-Optimized Mixed-Precision DNN Accelerator with Vector Split- and-Combination Systolic in 28nm CMOS

Quantization is widely used for DNN compression that usually leads to networks under multiple precisions. One has to configure and support different precisions of operations for the entire network. Envision [1] and TinyVers [2] deploy 16-bit and 8-bit as basic operation units respectively that is further split to low-precision-bit operation. UNPU [3], Bitblade [4] and Marsellus [5] utilize 1-bitx16-bit, 2-bitx2-bit, and t-bix 1-bit as basic operation units respectively that are further combined to support high-precision-bit operations. Most of these works are however not able to optimally select a precision at each layer in a network, and hence commonly result in both low energy and area efficiency.