LAMPS: A Layer-wised Mixed-Precision-and-Sparsity Accelerator for NAS-Optimized CNNs on FPGA

Shuxin Yang; Chenchen Ding; Mingqiang Huang; Kai Li; Chenghao Li; Zikun Wei; Sixiao Huang; Jingyao Dong; Liuyang Zhang; Hao Yu

10.1109/FCCM60383.2024.00019

2024-05-08

2576-2613

979-8-3503-7244-1

2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)

5-8 May 2024

Orlando, FL, USA

The increasing model size and computation load of convolutional neural networks (CNN) pose a grand challenge to deploy CNN models on edge computing devices. To further improve performance without significant accuracy loss, this paper developed a neural architecture search (NAS) method to achieve a layer-wise mixed-precision-and-sparsity (LAMPS) CNN. However, this optimization cannot be fully utilized and directly mapped to existing AI accelerators due to the irregu- lar computation of sparse and multi-precision data. To tackle this challenge, this work proposed a LAMPS vector systolic accelerator and demonstrated state-of-the-art results. Experi- mental results show that the LAMPS accelerator on Xilinx ZCU102 achieves an average performance of 756.83 GOPS and 470.25 GOPS when accelerating the NAS-optimized VGG16 and Resnet18, respectively, leading to 1.3-6.0x speed-up over the state- of-the-art accelerators on FPGA.

第一

School of Microelectronics, Southern University of Science and Technology, Shenzhen, China

Shuxin Yang,Chenchen Ding,Mingqiang Huang,et al. LAMPS: A Layer-wised Mixed-Precision-and-Sparsity Accelerator for NAS-Optimized CNNs on FPGA[C],2024.