Self-aware Hierarchical Neuromorphic Architecture

Zilu Wang1,2; Xin Yao2,3

10.1109/IJCNN60899.2024.10651207

2024-07-05

2161-4393

979-8-3503-5932-9

2024 International Joint Conference on Neural Networks (IJCNN)

30 June-5 July 2024

Yokohama, Japan

We introduce a neuromorphic architecture devised by mapping biologically inspired concepts onto a computational framework for self-awareness, offering a new way to embed inherent autonomy directly within hardware. Leveraging this architecture as a blueprint, we have designed a memristor-based circuit capable of autonomous decision-making, employing a bio-inspired hierarchical design approach. The core of this approach involves translating the functions of biological neurons and synapses into memristor-based circuits, which act as efficient computational units at the bottom layer of the circuit. It ensures that the developed circuit strikes a balance between functional flexibility and computational efficiency. Experimental results show that our implemented circuit provides efficient computational capabilities for effective decision-making, thanks to its memristor-based bio-inspired hierarchical implementation. Furthermore, its neuromorphic architecture inspired by self-awareness facilitates the easy simulation of reliable autonomous behaviors. Through the analysis of hardware overhead and power consumption, our circuit proves to be hardware-friendly. Our work represents progress towards developing memristor-based neuromorphic circuits characterized by high computational performance and autonomous functionality.

其他

1.School of Mechanical Engineering and Automation, Harbin Institute of Technology (Shenzhen), Shenzhen, China
2.Department of Computer Science and Engineering, Southern University of Science and Technology, Shenzhen, China
3.Faculty of Business, Lingnan University, Hongkong, China

Zilu Wang,Xin Yao. Self-aware Hierarchical Neuromorphic Architecture[C],2024.